cmovies
   
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8051 的 Timer 都为上数(从 0 到 255), 所以应该是 256 - 3 = 253
SMOD = 1 代表两倍(只对 Timer 1 当 BaudRate 有效)
11.0592MHz, TH1=253(Mode2), SMOD=1 -> BaudRate = 19200 bps
>如果用模式2如何不使用bit9同位元简检查
你所指的是 Timer 1 用 Mode 2 还是 SCON 中的 Mode 2 (9-bit UART with OSC/64 or OSC/32)???
不过你用 TH1 来当 BaudRate, 应该指的是 Timer 1 用 Mode 2 吧!?
这样只要 SCON 设成 Mode 1 就没有 9th bit
SCON bit description:
SM0 SM1 Mode Description Baud Rate
0 0 0 shift register fosc./12
0 1 1 8-bit UART variable
1 0 2 9-bit UART fosc./64 or fosc./32
1 1 3 9-bit UART variable
SM0 SCON.7
SM1 SCON.6
SM2 SCON.5 Enables the multiprocessor communication feature in
Mode 2 and 3. In Mode 2 or 3, if SM2 is set to 1 then
RI will not be activeated if the received 9th data bit
(RB8) is 0. In Mode 1, if SM2 = 1 then RI will not be
activated if a valid stop bit was not received. In
Mode 0, SM2 should be 0.
REN SCON.4 Set/Cleared by software to Enable/Disable reception.
TB8 SCON.3 The 9th bit that will be transmitted in mode 2 & 3.
Set/Cleared by software.
RB8 SCON.2 In mode 2 & 3, is the 9th data bit that was received.
In mode 1, if SM2 = 0, RB8 is the stop bit that was
received. In mode 0, RB8 is not used.
TI SCON.1 Transmit interrupt flag. Set by hardware at the end of
the 8th bit time in mode 0, or at the beginning of the
top bit in the other modes. Must be cleared by software.
RI SCON.0 Receive interrupt flag. Set by hardware at the end of
the 8th bit time in mode 0, or halfway through the stop
bit time in the other modes (except see SM2). Must be
cleared by software.
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 x0
[3 楼]
From：台湾中华电信
| Posted：2006-11-14 08:57 |
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cmovies
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SCON 的设定是一样的, 需要设定的是 T2CON 跟 RCAP2L, RCAP2H
只要将 RCLK, TCLK 设为 1, 就是使用 Timer 2 当 BaudRate
如果看 Datasheet 方便的话, 直接到 Intel/Atmel,.. 的 52 系列资料来看就很详细了
; T2CON bit description:
; TF2 T2CON.7 Timer 2 overflow flag set by a Timer 2 overflow and must
; be cleared by software. TF2 will not be set when either
; RCLK = 1 or TCLK = 1.
; EXF2 T2CON.6 Timer 2 external flag set when either a capture or
; reload is caused by a negative transition on T2EX and
; EXEN2 = 1. when Timer 2 interrupt is enabled, EXF2 = 1
; will cause the CPU to vector to the Timer 2 interrupt
; routine. EXF2 must be cleared by software.
; RCLK T2CON.5 Receive clock flag. When set, causes the serial port to
; use Timer 2 overflow pulses for its receive clock in
; Modes 1 and 3. RCLK = 0 causes Timer 1 overflow to be
; used for the receive clock.
; TCLK T2CON.4 Transmit clock flag. When set, causes the serial port to
; use Timer 2 overflow pulses for its transmit clock in
; Modes 1 and 3. TCLK = 0 causes Timer 1 overflow to be
; used for the transmit clock.
; EXEN2 T2CON.3 Timer 2 external enable flag. When set, allows a capture
; or reload to occur as a result of a negative transition
; on T2EX if Timer 2 is not being used to clock the serial
; port. EXEN2 = 0 causes Timer 2 to ignore events at T2EX.
; TR2 T2CON.2 Start/Stop control for Timer 2. A logic 1 starts the
; timer.
; C/T2- T2CON.1 Timer or counter select. (Timer 2)
; 0 = Internal timer (OSC/12)
; 1 = External event counter (falling edge triggered)
; CP/RL2- T2CON.0 Capture/Reload flag. When set, captures will occur on
; negative transitions at T2EX if EXEN2 = 1. When cleared,
; auto-reloads will occur either with Timer 2 overflows or
; negative transitions at T2EX when EXEN2 = 1. When either
; RCLK = 1 or TCLK = 1, this bit is ignored and the timer
; is forced to auto-reload on Timer 2 overflow.
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x0
[7 楼]
From：台湾中华电信
| Posted：2006-11-22 00:12 |
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